Digital Electronics

RIPPLE CARRY ADDER

Introduction:

Ripple carry adder is designed in a way that mimics human’s way of adding two numbers.

Consider two decimal numbers, $A=5473$ and $B=2568$. The following explains how these two numbers are added.

Step $1$: The least significant digit of both numbers are first added. If we get a two digit number as answer, we retain one digit as sum and carry other digit to next position.

Step $2$: Then the next digit of both numbers are added with the carry of previous digit.

Step $3$: Repeat step $2$ until most significant digit is reached.

Binary Addition:

The method of adding two binary numbers is same as decimal addition, hence

Why the name???

The above type of addition method is termed as Ripple carry addition.

Why the name??

Ripple Effect: As in the above image, a small droplet causing small disturbance propagates/spreads outward to make a huge wave is called as Ripple effect.

In the above addition process, carry that is generated in the first stage propagates to the next position, then to next, next next… like the ripple effect.

That’s why the name ‘Ripple Carry Addition’

Implementation of Ripple Carry Addition:

As we can see, Decimal addition, Hexadecimal addition, Binary addition, etc., follows the same procedure. Hence we can generalize it as follows,

B3  B2  B1  B0
B3  B2  B1  B0
S3  S2  S1  S0
S3  S2  S1  S0
A3  A2  A1  A0
A3  A2  A1  A0
C3
C3
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Whatever be the size of the number, we always add it bit by bit. So, to realize the above addition operation, we need $1$-bit adders. As we discussed earlier, half-adder and full-adder are $1$-bit adders. 

Half-Adder: adds two $1$-bit numbers $$\{ C_{out}, Sum\}=A+B$$

Full-Adder: adds three $1$-bit numbers $$\{ C_{out}, Sum\}=(A+B)+C_{in}$$

Half Adder
Half Adder
A
A
B
B
Sum
Sum
Cout
Cout
Cout
Cout
Full Adder
Full Adder
A
A
B
B
Cin
Cin
Sum
Sum
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Implementation of Ripple carry addition is explained bit by bit,

Stage $1$ $(A_0,\;B_0)$ :

Addition of LSB of $A$ and $B$ involves adding two bits $A_0$ and $B_0$ and getting Sum$(S_0)$ and Carry $(C_0)$ as output. This stage addition process can be realized using an Half-Adder.

               S0
               S0
B3  B2  B1  B0
B3  B2  B1  B0
Half Adder
Half Adder
A0
A0
B0
B0
S0
S0
Co
Co
C0
C0
A3  A2  A1  A0
A3  A2  A1  A0
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Stage $2$ $(A_1,\;B_1)$ :

Next step in adding $A$ and $B$ involves adding two bits $A_1$ and $B_1$ and incoming carry $C_0$, which gives us Sum$(S_1)$ and Carry $(C_1)$ as output. This stage addition process can be realized using a Full-Adder.

C1
C1
          S1  S0
          S1  S0
B3  B2  B1  B0
B3  B2  B1  B0
Full Adder
Full Adder
A1
A1
B1
B1
S1
S1
Co
Co
C1
C1
C0
C0
A3  A2  A1  A0
A3  A2  A1  A0
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Stage $3$ $(A_2,\;B_2)$ :

This stage addition process also can be realized using a Full-Adder.

     S2  S1  S0
     S2  S1  S0
B3  B2  B1  B0
B3  B2  B1  B0
Full Adder
Full Adder
A2
A2
B2
B2
S2
S2
C1
C1
C2
C2
C1
C1
A3  A2  A1  A0
A3  A2  A1  A0
C2
C2
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Stage $4$ $(A_3,\;B_3)$ :

This stage addition process also can be realized using a Full-Adder.

B3  B2  B1  B0
B3  B2  B1  B0
S3  S2  S1  S0
S3  S2  S1  S0
Full Adder
Full Adder
A3
A3
B3
B3
S3
S3
Cout
Cout
C2
C2
C2
C2
A3  A2  A1  A0
A3  A2  A1  A0
Cout
Cout
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The above addition process can be realized using a Full-Adder.

Combining the above four adders, we will get a $4$-bit Ripple Carry Adder.

C2
C2
Half Adder
Half Adder
Full Adder
Full Adder
Full Adder
Full Adder
Full Adder
Full Adder
A0
A0
B0
B0
B1
B1
A1
A1
B2
B2
A2
A2
B3
B3
A3
A3
S0
S0
S1
S1
S2
S2
S3
S3
Cout
Cout
C1
C1
C0
C0
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First adder stage can be implemented with half-adder (as shown above) or with full-adder (as shown below), 

C2
C2
Full Adder
Full Adder
Full Adder
Full Adder
Full Adder
Full Adder
Full Adder
Full Adder
A0
A0
B0
B0
B1
B1
A1
A1
B2
B2
A2
A2
B3
B3
A3
A3
S0
S0
S1
S1
S2
S2
S3
S3
Cout
Cout
C1
C1
C0
C0
Cin=0
Cin=0
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Practice Question

How many EXOR gates are needed to implement a four bit ripple carry adder?

a) $7$
b) $8$ 
c) $6$
d) $9$

Correct Answer: Option A

To implement a four bit ripple carry adder, we need $3$ full adders and $1$ half adder.

One full adder has $2$ EXOR gates and one half adder has $1$ EXOR gate.

No of EXOR gates needed $=(3×2)+1=7$