Adders
HALF ADDER & FULL ADDER USING NAND
Half adder:
$$Sum=A\oplus B$$$$Carry=AB$$
Implementation of Half adder using $5$ NAND gates:
Since NAND and NOR gates are universal gates, we need to study about how a half adder can be implemented using NAND or NOR gates only.
EXOR using $4$ NAND gates:
SOP of EXOR function is $$AB’+A’B\tag{1}$$
POS of EXOR function is $$(A’+B’)(A+B)\tag{2}$$
Using De-Morgan’s theorem, $(A’+B’)=(AB)’$, the above function can be written as, $$=(AB)'(A+B)\tag{3}$$$$=A(AB)’+B(AB)’\tag{4}$$ Realizing the above function using one NAND gate, two AND gates and one OR gate, we get
Now replacing, AND & OR with NAND gives us,
From $(4)$, $$=A(AB)’+B(AB)’$$Using $(A’)’=A$$$=\overline{\overline{A(AB)’+B(AB)’}}$$ $$=\overline{\overline{(A(AB)’)}\cdot \overline{(B(AB)’)}}$$
Half Adder using $5$ NAND gates:
Full Adder:
$$Sum=A\oplus B\oplus C_{in}$$$$C_{out}=AB+BC_{in}+AC_{in}$$
Implementation of Full adder using $9$ NAND gates:
In the above circuit, two half adders and one OR gate can be replaced by its NAND equivalent,