Adders
DELAY IN TERMS OF $t_{sum}$ & $t_{carry}$
Delay:
Delay in an adder is the amount of time taken to produce a stable output (Sum and Carry) from the applied input.
Delay in a Ripple Carry Adder:
Consider a $4$-bit ripple carry adder with four full adders as shown below,
Maximum delay in a ripple carry adder occurs only if last stage full adder has to wait for the first stage full adder’s carry
In detail,
First stage: has to generate carry.
Intermediate stages: has to propagate the carry.
Last stage: has to utilize the incoming carry to generate its sum and output carry.
Both carry generation and carry propagation process involves same amount of delay. Hence simply $t_{carry}$ for both process.
Carry utilization involves sum generation and carry generation/deletion. Among them sum generation takes more time. Hence $t_{sum}$.
For a $4$-bit ripple carry adder, maximum delay in producing stable output is, $$t_{ripple}=t_{sum}+\;3\;×\;t_{carry}$$
For n-bit ripple carry adder $$t_{ripple}=t_{sum}+\;(n-1)\;×\;t_{carry}$$
Practice Question
A $16$-bit ripple carry adder is realized using $16$ identical full adders (FA) as shown in the figure. The carry-propagation and carry-generation delay of each FA is $12$ ns and the sum-generation delay of each FA is $15$ ns. The worst case delay (in ns) of this $16$-bit adder will be __________.
Correct Answer: $195 \;ns$
To calculate the worst case delay, we need to assume that $FA_{15}$ has to wait for the carry of $FA_0$ to calculate its $S_{15}$.
First stage: Carry generation
Last stage: Carry utilization (Sum generation)
Intermediate stages: Carry Propagation
Hence, worst case delay will be $$=t_{sum}+\;15\;×\;t_{carry}$$ $$=15+\;(15\;×\;12)$$$$=15+\;180$$$$=195\;ns$$