Digital Electronics

HALF ADDER & FULL ADDER USING NOR

Half adder:

$$Sum=A\oplus B$$$$Carry=AB$$

Implementation of Half adder using $5$ NOR gates:

EXOR using $5$ NOR gates:

SOP of EXOR function is $$AB’+A’B\tag{a}$$

POS of EXOR function is $$(A’+B’)(A+B)\tag{b}$$

Using $(A’)’=A$, the above POS can be written as $$=\overline{\overline{(A’+B’)(A+B)}}$$ Using De-Morgan’s theorem $A’+B’=(AB)’, $$=\overline{\overline{(AB)’}+\overline{(A+B)}}$$$$=\overline{(AB)+\overline{(A+B)\tag{c}}}$$

Realizing the above function using two NOR gates and one AND gate, we get

Now, replacing AND gate with NOR gate.

From$(c)$,$$=\overline{(AB)+\overline{(A+B)}}$$$$=\overline{\overline{(A’+B’)}+\overline{(A+B)}}$$

Half Adder using $5$ NOR gates:

Full Adder:

$$Sum=A\oplus B\oplus C_{in}$$$$C_{out}=AB+BC_{in}+AC_{in}$$

Implementation of Full adder using $9$ NOR gates:

Replacing two half adders and one OR gate with its NOR equivalent,

The above circuit has $12$ NOR gates, we have to find some other way to reduce the number of gates.

To achieve this, we need to utilize two facts,

Fact $1$: $A \oplus B \oplus C=A\operatorname{xnor}B\operatorname{xnor}C$ $$A\oplus B \oplus C=(A\oplus B)’C+(A \oplus B) C’$$$$=(A \operatorname{xnor} B) C+(A\operatorname{xnor} B)’C’$$$$=A \operatorname{xnor} B\operatorname{xnor}C$$

Fact $2$: Two input EXNOR gate can be implemented using $4$ NOR gates. SOP of EXNOR is $AB+A’B’$. 

Since $A’B’=(A+B)’$, the above SOP function can be written as, $$AB+A’B’ = AB+(A+B)’$$Since $AB+C=(A+C)(B+C)$$$=(A+(A+B)’)\cdot (B+(A+B)’)$$Since $(A’)’=A$,$$=\overline{\overline{(A+(A+B)’)\cdot (B+(A+B)’)}}$$$$=\overline{\overline{(A+(A+B)’)}+\overline{(B+(A+B)’)}}$$

EXNOR using NOR gates:

Full Adder using NOR gates:

$C_{out}$:$$C_{out}=AB+(A\oplus B)C_{in}$$The dual form of the above equation is,$$C_{out}=(A+B)\cdot ((A\operatorname{xnor}B)+C_{in})$$By using $(A’)’=A$,$$C_{out}=\overline{\overline{(A+B)\cdot ((A\operatorname{xnor} B)+C_{in})}}$$$$C_{out}=\overline{\overline{(A+B)}+ \overline{((A\operatorname{xnor} B)+C_{in})}}$$

Remember: The above circuit is just a full adder and it cannot be separated as two half adders.